Category: Black Hat

The Devil is in the (Micro-) Architectures: Uncovering New Side-Channel and Bit-Flip Attack Surfaces

  • Haco
  • September 2, 2025
  • 2 min read

Jolio and Yenzo discusses new attack vectors on Deep Neural Network (DNN) executables, specifically focusing on side-channel and bit-flip vulnerabilities. Here's a summary of the key points: DNN Executables and Vulnerabilities: The talk begins by explaining that cloud service providers deploy machine learning models as valuable services. Attackers can exploit side-channels to learn about the architecture of these models, which then opens the door for other attacks. The speakers investigate if DNN executables, created through deep learning compilation for performance, are also vulnerable. Deep Compilation and Side-Channels: Deep…

Arbitrary Data Manipulation and Leakage with CPU Zero-Day Bugs on RISC-V

  • Haco
  • September 2, 2025
  • 2 min read

Fabian Thomas and Laurent Schmierer, introduces "GhostRider," a zero-day vulnerability they discovered in the T-Head C910 RISC-V processor. This vulnerability allows for data manipulation and leakage by bypassing software isolation and writing directly to physical memory. Here are the key points discussed: GhostRider Vulnerability: This exploit allows unprivileged applications to bypass operating systems and other security measures to interact directly with hardware. It exploits a flaw in a RISC-V vector instruction to write to physical memory instead of virtual memory, enabling arbitrary data manipulation, memory leakage, and privilege…

The Hack@DAC Story: Learnings from Organizing the World’s Largest Hardware Hacking Competition

  • Haco
  • September 27, 2024
  • 2 min read

Computing Stack Challenges Observed During Offensive Security Research at Intel Awareness of Hardware Common Weaknesses [CONCEPTS] Security-Aware Design Automation [TOOLS] "Shift-Left" to Detect & Fix Bugs in RTL [BEST PRACTICES] 1. Limited Awareness of HW Security Weaknesses 2. Need for Security-Aware Design Automation Tools 3. Need to Detect/Fix Bugs at RTL Design Phase SW bugs fixed with patches HW bugs are complicated to fix Time consuming Expensive Cause brand damage System on a Chip(Soc) Data Confidentiality Protect secrets from unauthorized access Data Integrity Protect data modification by untrusted…